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Triconex 3008N Digital Module
Product status: 1.New & Original 2.In Stock
Series: Tricon Safety System
Product Description
The Triconex 3008N is an enhanced Main Processor module used in Tricon v9.6 and later systems. Every Tricon main chassis requires three Main Processors, with each module independently controlling one processing leg, communicating with its associated I/O subsystem and executing the user-developed control program.
Each processor module contains separate 32-bit processors for application execution and I/O/communication management. The three Main Processors exchange and validate data through the high-speed TriBus, supporting fault-tolerant control without sharing clocks, power regulators or processing circuitry.
Specifications
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Product Type |
Enhanced Main Processor Module |
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Compatible System |
Tricon v9.6 and later |
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System Architecture |
Triple Modular Redundancy |
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Required Configuration |
Three Main Processors per main chassis |
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Main Processor |
Motorola MPC860 |
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Processor Architecture |
32-bit |
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Processor Clock |
50 MHz |
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Application Memory |
16 MB DRAM, without battery backup |
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Retentive Memory |
32 KB SRAM, battery-backed |
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Program Storage |
6 MB Flash PROM |
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TriBus Speed |
25 Mbps |
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TriBus Protection |
32-bit CRC |
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Data Transfer |
32-bit DMA, fully isolated |
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Communication Processor |
Motorola MPC860, 32-bit, 50 MHz |
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Communication Interface |
RS-485, 2 Mbps |
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I/O Interface |
RS-485, 375 kbps |
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Diagnostic Port |
Optically isolated RS-232, DB-25 |
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Diagnostic Port Isolation |
500 VDC |
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Logic Power |
10 W |
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Timekeeping |
Battery-backed TriClock |
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Typical Clock Drift |
±2 seconds per day |
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Maximum Clock Drift |
±2.16 seconds per day |
Application Areas
Emergency shutdown systems
Fire and gas protection systems
Burner management systems
Turbine and compressor control
Oil and gas production facilities
Refineries and petrochemical plants
Key Features
Independent TMR processing
Three 3008N modules operate as separate processing legs, reducing dependence on any single processor or shared circuit.
Dual-processor architecture
One processor executes the safety application, while the second handles I/O and communication activity.
High-speed TriBus
A fully isolated 25 Mbps interface supports processor-to-processor communication and hardware voting.
Multiple memory types
DRAM supports active program execution, battery-backed SRAM retains selected data, and Flash PROM provides non-volatile storage.
Continuous self-diagnostics
The module checks processor instructions, memory, communication processors, shared-memory interfaces, RS-485 loopback, TriClock and TriBus operation.
Company Service
One-Year WarrantyNew and Original Products Available
Large In-Stock Inventory
Fast Worldwide Delivery
Careful Packaging Before Shipment
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